Cancellation of linear intersymbol interference for two-dimensional storage systems

This paper discusses the cancellation of linear intersymbol interference (ISI) in two-dimensional (2-D) systems. It develops a theory for the error rate of receivers that use tentative decisions to cancel ISI. It also formulates precise conditions under which such ISI cancellation can be applied effectively. For many 2-D systems, these conditions are easily met, and therefore the application of ISI cancellation is of significant interest. The theory and the conditions are validated by simulation results for a 2-D channel model. Furthermore, results for an experimental 2-D optical storage system show that, for a single-layer disk with a capacity of 50 GB, a substantial performance improvement may be obtained by applying ISI cancellation

Near minimum bit-error rate equalizer adaptation for PRML systems

Receivers for partial response maximum-likelihood systems typically use a linear equalizer followed by a Viterbi detector. The equalizer tries to confine the channel intersymbol interference to a short span in order to limit the implementation complexity of the Viterbi detector. Equalization is usually made adaptive in order to compensate for channel variations. Conventional adaptation techniques, e.g. LMS, are in general suboptimal in terms of bit-error rate. In this paper we present a new equalizer adaptation algorithm that seeks to minimize bit-error rate at the Viterbi detector output. The algorithm extracts information from the sequenced amplitude margin (SAM) histogram and incorporates a selection mechanism that focuses adaptation on particular data and noise realizations. From a complexity standpoint, the algorithm is as simple as the conventional LMS algorithm. Simulation results, for an idealized optical storage channel, confirm a substantial performance improvement relative to existing adaptation algorithm

Minimum latency tracking of rapid variations in two-dimensional storage systems

The trend of increasing storage densities results in growing sensitivity of system performance to variations of storage channel parameters. To counteract these variations, more adaptivity is needed in the data receiver. Accurate tracking of rapid variations is limited by latencies in the adaptation loops. These latencies are largely governed by delays of the bit detector. In two-dimensional storage systems, data are packaged in a group of adjacent tracks or rows, and for some of the rows the detection delays can increase dramatically with respect to one-dimensional systems. As a result, the effective latencies in the adaptation loops preclude the tracking of rapid variations and really limit the performance of the system. In this paper, a scheme is proposed that overcomes this problem and that can be used for timing recovery, automatic gain control, and other adaptive circuits. Rapid variations for all the rows are tracked using control information from rows for which detector latency is smallest. This works properly if rapid variations are common across the rows as is the case, for example, for the two-dimensional optical storage (TwoDOS) system. Experimental results for TwoDOS confirm that the scheme yields improved performance with respect to conventional adaptation scheme

Refinements of multi-track Viterbi bit-detection

In optical storage, data can be arranged on the disc in a meta-spiral consisting of a large number of bit-rows with a small track-pitch. Successive revolutions of the meta-spiral are separated by a narrow guard band. For high storage densities, such a system results in severe 2-D inter-symbol interference. In the multi-track Viterbi algorithm (MVA) of Krishnamoorthi and Weeks, the complex problem of 2-D bit-detection is broken down into a number of smaller bit-detection problems on sets of adjacent bit-rows called stripes. We improve the bit error rate (bER) performance of such a 2-D bit-detector via a number of measures such as: 1) weighing of the separate contributions to the branch metrics from each bit-row in a stripe and 2) inclusion of an additional contribution to the branch metrics from a bit-row adjacent to a stripe. In addition, we reduce the computational complexity by varying the number of bit-rows per stripe during successive iterations of the MVA, and through the use of local sequence feedback